x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 14 Feb 2018 10:38:34 +0000 (10:38 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 14 Feb 2018 13:22:15 +0000 (13:22 +0000)
commita2b08fbed388f18235fda5ba1655c1483ef3e215
tree77edbbe735eba1469bd4ace9f3708b028b7ec8cf
parentf25dce4a2adf518678280495712d66e627adec1e
x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST

DO_OVERWRITE_RSB clobbers %rax, meaning in practice that the bti_ist_info
field gets zeroed.  Older versions of this code had the DO_OVERWRITE_RSB
register selectable, so reintroduce this ability and use it to cause the
INTR_IST path to use %rdx instead.

The use of %dl for the %cs.rpl check means that when an IST interrupt hits
Xen, we try to load 1 into the high 32 bits of MSR_SPEC_CTRL, suffering a #GP
fault instead.

Also, drop an unused label which was a copy/paste mistake.

Reported-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reported-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
xen/include/asm-x86/spec_ctrl_asm.h